【CHES 2025】Jan. 15@Kuala Lumpur, Malaysia

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【CHES 2025】

Important dates

Schedule for TCHES Volume 2025/3

Submission deadline: January 15, 2025
Rebuttal phase: February 17-21, 2025
Notification: March 15, 2025
Final version due: April 14, 2025
Conference: September 14-18, 2025
CCF: B

Topics of interest include but are not limited to

Cryptographic implementations

Hardware architectures
Cryptographic processors and coprocessors
True and pseudorandom number generators
Physical unclonable functions (PUFs)
Efficient software implementation
SHARCS (Special-purpose HARdware for Cryptanalysis, quantum included)

Attacks against implementations, and countermeasures

Remote, micro-architectural and physical side-channel attacks and countermeasures
Fault attacks and countermeasures
Hardware tampering and tamper-resistance
White-box cryptography and code obfuscation
Reverse engineering of hardware/software
Hardware trojans and countermeasures

Tools and methodologies

Formal methods, techniques and tools for secure design and verification for hardware/software
Computer aided cryptographic engineering
Domain-specific languages for cryptographic systems
Metrics for the security of embedded systems
FPGA design security
Physical assurance and analysis of embedded systems

Interactions between cryptographic theory and implementation issues

Quantum cryptanalysis
Algorithm subversion and subversion prevention
New and emerging cryptographic algorithms and protocols targeting embedded devices
Theoretical hardware models that allow proofs

Applications

RISC-V security
Trusted execution environments and trusted computing platforms
IP protection for hardware/software and technologies for anti-counterfeiting
Reconfigurable hardware for cryptography
Secure elements, security subsystems, and applications
Security for the Internet of Things and cyberphysical systems (RFID, sensor networks, smart meters, medical implants, smart devices for home automation, industrial control, automotive, etc.)
Secure storage devices (memories, disks, etc.)
Isolation and monitoring hardware for cyberresilience
Engineering of zero-knowledge proof systems
Privacy-preserving computing in practice (MPC, FHE)
Post-quantum security

Having been established in 1999, the Cryptographic Hardware and Embedded Systems (CHES) conference is the premier venue for research on both design and analysis of cryptographic hardware and software implementations. As an area conference of the International Association for Cryptologic Research (IACR), CHES bridges the cryptographic research and engineering communities, and attracts participants from academia, industry, government and beyond. CHES 2025 will take place in Kuala Lumpur, Malaysia in September 14-18, 2025.

General Co-Chairs

Muhammad Reza Z’aba, MIMOS, Malaysia
Muhammad Rezal Kamel Ariffin, Universiti Putra Malaysia, Malaysia
Norziana Jamil, United Arab Emirates University, United Arab Emirates and Universiti Tenaga Nasional Malaysia

Program Co-Chairs

Michael Hutter, PQShield, Austria
Debdeep Mukhopadhyay, Indian Institute of Technology Kharagpur, India

Program Committee

Anita Aghaie, Siemens AG
Diego F. Aranha, Aarhus University
Victor Arribas, Rambus Inc.
Aydin Aysu, North Carolina State University
Sebastian Berndt, Technische Hochschule Lübeck
Shivam Bhasin, Nanyang Technological University
Sarani Bhattacharya, IIT Kharagpur
Billy Bob Brumley, Rochester Institute of Technology
Ileana Buhan, Radboud University
Fabio Campos, RheinMain University of Applied Sciences
Gaëtan Cassiers, UCLouvain
Durba Chatterjee, Radboud University
Jesús-Javier Chi-Domínguez, Technology Innovation Institute (TII)
Lukasz Chmielewski, Masaryk University
Marios Omar Choudary, University Politehnica of Bucharest
Chitchanok Chuengsatiansup, University of Melbourne
Thomas Eisenbarth, University of Lübeck
Daniel Genkin, Georgia Tech
Benedikt Gierlichs, KU Leuven
Qian Guo, Lund University
Julius Hermelink, Max Planck Institute for Security and Privacy (MPI-SP)
Johann Heyszl, Google
Xiaolu Hou, Slovak University of Technology
Michael Hutter, PQShield
Chenglu Jin, CWI Amsterdam
Marc Joye, Zama
Kimmo Järvinen, Xiphera Ltd.
Matthias J. Kannwischer, Chelpis Quantum Corp
Elif Bilge Kavun, University of Passau
Tanja Lange, Eindhoven University of Technology
Leibo Liu, Tsinghua University
Patrick Longa, Microsoft Research
Roel Maes, Synopsys
Cuauhtemoc Mancillas-Lopez, Cinvestav-IPN
Mihalis Maniatakos, New York University Abu Dhabi
Loïc Masure, LIRMM CNRS
Thorben Moos, UCLouvain
Amir Moradi, TU Darmstadt
Debdeep Mukhopadhyay, IIT Kharagpur
Svetla Nikova, KU Leuven
David Oswald, University of Birmingham
Daniel Page, University of Bristol
Sri Parameswaram, University of Sydney
Sikhar Patranabis, IBM Research India
Peter Pessl, Infineon
Romain Poussier, ANSSI
Bart Preneel, KU Leuven
Robert Primas, Intel
Chester Rebeiro, IIT Madras
Francesco Regazzoni, University of Amsterdam & Università della Svizzera Italiana
Joost Renes, NXP Semiconductors
Jan Richter-Brockmann, Ruhr University Bochum
Sujoy Sinha Roy, Graz University of Technology
Markku-Juhani Saarinen, Tampere University
Sayandeep Saha, IIT Bombay
Kazuo Sakiyama, The University of Electro-Communications
Simona Samardjiska, Radboud University
Pascal Sasdrich, Ruhr University Bochum
Erkay Savas, Sabanci University
Jean-Pierre Seifert, TU Berlin
Aein Shahmirzadi, PQShield
Georg Sigl, TU Munich & Fraunhofer AISEC
François-Xavier Standaert, UCLouvain
Rainer Steinwandt, University of Alabama in Huntsville
Jakub Szefer, Northwestern University
Shahin Tajik, Worcester Polytechnic Institute
Junko Takahashi, NTT
Adrian Thillard, PQShield
Ming-Hsien Tsai, National Applied Research Labs
Michael Tunstall, Google
Aleksei Udovenko, University of Luxembourg
Rei Ueno, Kyoto University
Christine van Vredendaal, NXP Semiconductors
Vedad Hadžic, Graz University of Technology
Weijia Wang, Shandong University
Bohan Yang, Tsinghua University
Bo-Yin Yang, Academia Sinica
Yuval Yarom, Ruhr University Bochum